Recently, a multiprocessor system including a shared memory and plural processors is used to process large-capacity data such as image data. In such multiprocessor system, it is necessary to satisfy the following first to sixth requirements.
<First requirement> Allocation and release of the shared memory are mutually exclusive among processors.
<Second requirement> A 16 KB to 12 MB memory area is secured in the shared memory with respect to one piece of data. For example, it is necessary to secure the at least 1.3 MB continuous memory area in the shared memory with respect to image data having 1280 by 720 pixels.
<Third requirement> The shared memory can properly be allocated even if pieces of data having different sizes are mixed. For example, in order to simultaneously deal with image data of 16 KB for static image and image data of 12 MB for moving image, it is necessary to properly allocate the shared memory even if the image data of 16 KB and the image data of 12 MB are mixed.
<Fourth requirement> Fragmentation of the shared memory can be prevented. Particularly, in the case that large-capacity data such as the image data is dealt with, the fragmentation tends to be easily generated because of a large ratio of a data capacity to a capacity of the shared memory. Accordingly, it is important to prevent the fragmentation in order to deal with the large-capacity data such as the image data.
<Fifth requirement> The number of data copy times is decreased. Particularly, in the large-capacity data such as the image data, an amount of data transferred between the shared memory and the processor is increased when the data is copied. Accordingly, it is important to decrease the number of data copy times in order to reduce a load on the multiprocessor system.
<Sixth requirement> Alignment between a boundary of a size (for example, 256 bytes or 1024 bytes) requested by a DMA (Direct Memory Access) module and a head address of data is established when the data is transferred with the DMA module. For example, in the case that the head address of the data is “0x400100”, the alignment is established at the boundary of a unit (256 bytes) requested by the DMA module, thereby improving data transfer efficiency.
However, the conventional memory managing apparatus does not satisfy all the first to sixth requirements.